System3Manual Updated: 2/12/15
1-4 System 3RZ2 BioAmp ProcessorSoftwareControlSoftware control is implemented with circuit files developed using TDT's RP Visual Design Studio
2-16 System 3RS4 Data StreamerStatusTabThe Status tab provides system information such as processor usage rates, core temperatures, fan speeds, devic
System 3 2-17RS4 Data Streamerestimated amount of time remaining is displayed. During this time the status array will not be ready.Check button: When
2-18 System 3RS4 Data StreamerConfigTabThe Config tab provides options for reformatting the currently installed storage array, updating the RS4 firmw
System 3 2-19RS4 Data StreamerMiscellaneousTasks:Provides options for updating the current RS4 firmware and rebooting the system. Update Firmware: C
2-20 System 3RS4 Data StreamerUSBPortsTwo USB 2.0 ports are provided for small/slower data transfers (typically less than several GB of data) or for
System 3 2-21RS4 Data StreamerTroubleshootingThe following section provides examples and solutions to some of the errors that could be encountered whi
2-22 System 3RS4 Data StreamerPorts that are not currently installed will be displayed in grayed out text. In most cases it is normal to see 3 of the
System 3 2-23RS4 Data Streamerreformat the storage array. See “Storage Array Types” on page 2-19 for information on reformatting. If reformatting is n
2-24 System 3RS4 Data StreamerRS4TechnicalSpecificationsProcessing Cores4Storage Array Size4 Terabytes or 8 TerabytesStreaming PortsNumber of Ports1
2-25PO8e Interface for the RZPO8eInterfacefortheRZPO8eOverviewThe RZ PO8e interface is an optional interface for RZ processor devices and is desi
System 3 1-5RZ2 BioAmp ProcessorAs shown in the diagram above, the RZ2 architecture consists of three functional blocks:The DSPs Each DSP in the DSP B
2-26 System 3PO8e Interface for the RZPO8eHardwareRequirementsBasic requirements include a paired fiber optic cable, an RZ processor equipped with t
System 3 2-27PO8e Interface for the RZSendingDataConstructData is sent whenever the “Send” input receives a rising trigger (logic high (1)). Up to 2
2-28 System 3PO8e Interface for the RZOrganizationofPO8eStreamingMethodsPO8eStreaming methods can be divided into three basic groups:• Setup and C
System 3 2-29PO8e Interface for the RZreleaseCardDescription: Free the PO8e card objects through this interface. It is done this way to ensure that in
2-30 System 3PO8e Interface for the RZwaitForDataReadyDescription: This function provides a means to efficiently wait for data to arrive from the RZ u
System 3 2-31PO8e Interface for the RZreadChannelDescription: Copy the data buffered for an individual channel. Note that this call does NOT advance
2-32 System 3PO8e Interface for the RZvoid pointerbufferThe location to write buffered data to.intnSamplesThe number of samples to read.in64_t pointer
System 3 2-33PO8e Interface for the RZReturns:int Number of channels in the current data stream.Sample CodeDescription: This code determines how many
2-34 System 3PO8e Interface for the RZC++ prototype: int getLastError();C prototype: int getLastError(void* card);Returns:int The most recent error co
Pa r t3:RXProcessors
1-6 System 3RZ2 BioAmp ProcessorMCPipeOut feeds data off the DSP to the DataPipe Bus.The RZ2_Input_MC macro also transfers inputs from the I/O interfa
3-2 System 3
3-3RX6 Multifunction ProcessorRX6MultifunctionProcessorRX6OverviewThe RX6 Multifunction Processor is a high performance multiple DSP device for re
3-4 System 3RX6 Multifunction Processordistributed across multiple processors and enables data to be transferred to the PC quickly and efficiently. Th
System 3 3-5RX6 Multifunction Processor Components such as MCzHopIn and MCzHopOut can be used for multi-channel signals while components such as zHop
3-6 System 3RX6 Multifunction ProcessorStatus IndicatorsCyc: cycle usageOvr: processor cycle overagesBus%: percentage of internal device's bus ca
System 3 3-7RX6 Multifunction Processorthe signal exceeds the maximum input voltage. See the preamplifier user guide for more information on input ran
3-8 System 3RX6 Multifunction ProcessorAnalogInput/OutputThe RX6 has two channels of 24-bit, sigma-delta D/A and two channels of 24-bit, sigma-delta
System 3 3-9RX6 Multifunction Processor3. Click Modify to display the Edit I/O Setup Control dialog box.In this dialog box, a series of check boxes ar
3-10 System 3RX6 Multifunction Processorinformation about amplifier status or act as activity lights for any of the other four bytes of digital I/O. X
System 3 3-11RX6 Multifunction Processor[x]=Fullyfunctional[x*]=Samplinglimitedto25KHzRX6TechnicalSpecificationsThe RX6 can be equipped wit
System 3 1-7RZ2 BioAmp ProcessorDataTransferRateAs with other devices, your expected sustained RZ-to-Host PC data rate should not exceed 1/2 to 2/3
3-12 System 3RX6 Multifunction ProcessorSignal‐to‐NoiseRatioDiagramThe following graph is of the signal to noise ratio with varying signal frequenci
System 3 3-13RX6 Multifunction ProcessorDB25ConnectorPinoutTDT recommends the PP24 patch panel for accessing the RX6 I/O.DigitalI/OPin Name Descrip
3-14 System 3RX6 Multifunction Processor
3-15RX8 Multi I/O ProcessorRX8MultiI/OProcessorRX8OverviewThe RX8 is a high channel count, high sample rate analog I/O system which provides a max
3-16 System 3RX8 Multi I/O ProcessorRXArchitectureEach RX multiprocessor device is equipped with either two or five digital signal processors (DSPs).
System 3 3-17RX8 Multi I/O Processor Components such as MCzHopIn and MCzHopOut can be used for multi-channel signals while components such as zHopIn,
3-18 System 3RX8 Multi I/O ProcessorStatusIndicatorsCyc: cycle usageOvr: processor cycle overagesBus%: percentage of internal device's bus capac
System 3 3-19RX8 Multi I/O ProcessorNote: Block C can only be configured with outputs.ChannelNumbersStarting with block A and ending with block C, ch
3-20 System 3RX8 Multi I/O Processorinputs or outputs. See the “Digital I/O Circuit Design” section of the RPvdsEx Manual for more information on prog
System 3 3-21RX8 Multi I/O Processor6. When the configuration is complete, click OK to return to the Set Hardware Parameters dialog box. BitCodesfor
1-8 System 3RZ2 BioAmp ProcessorLED will light for an input bit or it will show the logic level for an output bit.[D] and [E]: Analog I/O16 lights wil
3-22 System 3RX8 Multi I/O ProcessorSigma-Delta converters support a more limited set of sampling rates as shown in the table below. When using Sigma-
System 3 3-23RX8 Multi I/O Processor*Note: Because of device timing constraints at higher sampling rates, only the first 23 channels of analog I/O are
3-24 System 3RX8 Multi I/O ProcessorDigitalI/O Pin Name Description Pin Name Description1 BA0 Bit Addressable digital I/OBits 0, 2, 4, and 614 BA1 Bi
3-25RX5 Pentusa Base StationRX5Pe n tu s a BaseStationRX5OverviewThe RX5 Pentusa is a powerful multiple DSP device well suited for processing hig
3-26 System 3RX5 Pentusa Base Stationdistributed across multiple processors and enables data to be transferred to the PC quickly and efficiently. The
System 3 3-27RX5 Pentusa Base Station Components such as MCzHopIn and MCzHopOut can be used for multi-channel signals while components such as zHopI
3-28 System 3RX5 Pentusa Base Stationbooting status (Booting DSP) or alert the user when the device's microcode needs to be reprogrammed (Firmwar
System 3 3-29RX5 Pentusa Base StationAmpStatusandClipWarningLightsAmp lights are located to the right of each fiber optic port. These lights are
3-30 System 3RX5 Pentusa Base StationWhen the Bits lights are configured to display the amplifier status, the left column of lights indicates the powe
System 3 3-31RX5 Pentusa Base Station3. Click Modify to display the Edit I/O Setup Control dialog box.In this dialog box, a series of check boxes are
System 3 1-9RZ2 BioAmp Processorscale factor and so forth. Further detail can be found below the table. Also, see the RPvdsEx Manual for more informat
3-32 System 3RX5 Pentusa Base StationXLinkThe XLink is not supported at this time.Bit Flags Bits set to 1 Bit Lights Used For …000 None Logical level
System 3 3-33RX5 Pentusa Base StationRX5TechnicalSpecificationsSpecifications for the A/D converters are found under the preamplifier's technic
3-34 System 3RX5 Pentusa Base StationMultiI/ODigitalI/OPin Name Description Pin Name Description1AGND Analog Ground14 A1Analog Output Channels215A23
3-35RX7 Stimulator Base StationRX7Stimulat orBaseStationRX7OverviewThe RX7 base station is a high performance processor available with either two
3-36 System 3RX7 Stimulator Base StationRXArchitectureEach RX multiprocessor device is equipped with either two or five digital signal processors (DS
System 3 3-37RX7 Stimulator Base StationDistributingDataAcrossDSPsIn RPvdsEx data can be transferred between each of the auxiliary DSPs as well as
3-38 System 3RX7 Stimulator Base StationThe front panel VFD screen reports detailed information about the status of the system. The display includes t
System 3 3-39RX7 Stimulator Base StationHowever, the need may arise to run a circuit at a higher sampling rate while still acquiring data via a fiber
3-40 System 3RX7 Stimulator Base StationUsingtheBitsLightstoDisplayAmplifierStatusNote: Because clip warning and amplifier status are always di
System 3 3-41RX7 Stimulator Base StationConfiguringtheProgrammableI/OLinesEach of the eight bit-addressable lines can be independently configured
1-10 System 3RZ2 BioAmp Processorto 16 channels at a maximum sampling rate of 25 kHz. The Legacy fiber optic ports can be used with any of the Medusa
3-42 System 3RX7 Stimulator Base StationBitCodesforControllingtheBitLights(Boxes12‐14)By default, check boxes 12 –14 in the Edit I/O Setup Con
System 3 3-43RX7 Stimulator Base StationNote: Specifications for the stimulus isolator D/As and the preamplifiers A/D are found under the technical sp
3-44 System 3RX7 Stimulator Base StationDB25ConnectorPinoutsMultiI/ODigitalI/OPin Name Description Pin Name Description1 AGND Analog Ground 14 A1
Pa r t4:RPProcessors
4-2 System 3
4-3RP2.1 Real-Time ProcessorRP2.1Rea l‐TimeProcessorRP2.1OverviewThe RP2 and RP2.1 real-time processors consist of an Analog Devices Sharc floating
4-4 System 3RP2.1 Real-Time Processoreight bits of I/O can be used within the processing chain in a variety of ways including implementing triggers, t
System 3 4-5RP2.1 Real-Time ProcessorA, while the RP2-5 has a 50 kHz (25 kHz BW) A/D and D/A. Both devices allow for user programmable sampling rates
4-6 System 3RP2.1 Real-Time ProcessorDB25ConnectorPinOutNote: TDT recommends the PP16 Patch Panel for accessing digital I/O.Important!: Force is us
4-7RA16 Medusa Base StationRA16MedusaBaseStationRA16OverviewRecommended for single or dual channel extracellular recordings and low channel count
System 3 1-11RZ2 BioAmp ProcessorNote: For more information on addressing and Digital I/O see the RPvdsEx Manual.The RZ digital I/O ports have differe
4-8 System 3RA16 Medusa Base Stationon when there is a connection to an amplifier and the amplifier is on.Error The error light blinks when there is a
System 3 4-9RA16 Medusa Base StationSamplingRateConsiderationsThere are no onboard analog-to-digital converters (ADCs) on the Medusa base station. W
4-10 System 3RA16 Medusa Base StationDB25Analog/DigitalI/OConnectorPinOutNote: TDT recommends the PP16 patch panel for accessing the Digital I/O.
4-11RV8 BarracudaRV8BarracudaNote: This device is no longer available for new purchase.RV8OverviewThe Barracuda features include nanosecond accurate
4-12 System 3RV8 Barracudaten microseconds. For each digital input a unique time stamp is recorded for that sample period.TimeStampDiagramFastDigita
System 3 4-13RV8 BarracudaStatusLightsThe status lights indicate the state of the RV8. Armed, Running, DC (DoCount), and FreeRun. Combinations of the
4-14 System 3RV8 BarracudaBandwidthandTimingStandard Sample Rates are in powers of two from 6 kHz to 400 kHz. The actual sample rate is given in the
System 3 4-15RV8 BarracudaThe Special Modes are set with a bit-masked pattern. For example, to set the trigger mode using a zTRGA the value for the Sp
4-16 System 3RV8 Barracuda2. Determine the number of samples that the circuit runs. The Barracuda can play out over 4 Gsamples (4*109 samples) on one
System 3 4-17RV8 BarracudaTriggerModeThe first circuit requires three additional components: LinGate gates the output on and off, Schmitt opens and c
1-12 System 3RZ2 BioAmp ProcessorRZ2TechnicalSpecificationsNote: Technical Specifications for amplifier A/D converters are found under the preamplif
4-18 System 3RV8 Barracudasample period in seconds that you require and then divide by 1/(sample period). These circuits work only with the Barracuda.
System 3 4-19RV8 BarracudaActiveXThe Barracuda uses two additional ActiveX methods SetDevCfg and GetDevCfg. Detailed information about them is include
4-20 System 3RV8 BarracudaDB25ConnectorPinOutOptionI/ODB9ConnectorPinOutPin Name Description Pin Name Description1 Do0 Digital Output Channel
Pa r t5:RMMobileProcessors
5-2 System 3
5-3RM1/RM2 Mobile ProcessorsRM1/RM2MobileProcessorsRM1MobileProcessor(R M2notpictured)Note: These devices are no longer available for new purch
5-4 System 3RM1/RM2 Mobile ProcessorsRM1/RM2Proces sorHardwareThe RM1 Real-time Mini Processor and RM2 Mobile Processor combine a signal processor,
System 3 5-5RM1/RM2 Mobile ProcessorsPowerThe power light indicates that the device is connected to a power supply. The power may be supplied by an ex
5-6 System 3RM1/RM2 Mobile ProcessorsLevelThe RM has an internal speaker that is driven by channel 1 output. The Level knob controls the volume of the
System 3 5-7RM1/RM2 Mobile ProcessorsNote: The digital lines drive about 25 milliamps. ConfiguringtheProgrammableI/OLinesAll 8 digital lines are i
System 3 1-13RZ2 BioAmp ProcessorDB25AnalogI/OPinoutPin Name Description Pin Name Description1 NA Not Used 14 NA Not Used2153164175 AGND Analog Gro
5-8 System 3RM1/RM2 Mobile ProcessorsNote: Modifying any of the bits will change the default configuration (by default, bits 0-3 are inputs and bits 4
System 3 5-9RM1/RM2 Mobile ProcessorsRM2AcquisitionChannelInputThe channels from the preamplifier to the RM2 are mapped so that the system can acqu
5-10 System 3RM1/RM2 Mobile ProcessorsRM2FiberOpticInputsDigitalI/ODB9FemaleConnectorPinOutInputup to 16 channelsSampling Rate24.414 kHz maxP
Pa r t6:Preamplifiers
6-2 System 3
6-3PZ2 PreAmpPZ2PreAmpPZ2OverviewThe PZ2 is a high channel count preamplifier suitable for extracellular recordings. The PZ2 preamplifier features a
6-4 System 3PZ2 PreAmpOne or more Z-Series headstages can be connected to the input connectors on the PZ2 back panel. A 5-meter paired fiber optic cab
System 3 6-5PZ2 PreAmpDouble-clicking the macro in RPvdsEx displays the macro properties and allows users to easily configure the macro. Additional in
6-6 System 3PZ2 PreAmpIn this mode, LEDs are automatically enabled for default activity and clip warning display as described above.ExternalGroundThe
System 3 6-7PZ2 PreAmplast LED will flash red. TDT recommends charging the battery before this flashing low-voltage indicator comes on. While charging
ii System 3Copyright©2000-2015 Tucker-Davis Technologies, Inc. (TDT). All rights reserved.No part of this manual may be reproduced or transmitted in a
1-14 System 3RZ2 BioAmp ProcessorDB25DigitalI/OPinoutPin Name Description Pin Name Description1C0 Port CBit Addressable Digital I/OBits 0, 2, 4, an
6-8 System 3PZ2 PreAmp*Note: When sampling at a rate of 48.828 kHz the PZ2 preamplifier is limited to a maximum of 128 channels.**Note: If longer cabl
System 3 6-9PZ2 PreAmpPinoutDiagramNote: TDT technical support (386-462-9622 or [email protected]) before attempting to make any custom connections to
6-10 System 3PZ2 PreAmp
6-11PZ3 Low Impedance AmplifierPZ3LowImpedanceAmplifierPZ3OverviewThe PZ3 is a high channel count, low impedance amplifier well suited for ECOG, E
6-12 System 3PZ3 Low Impedance AmplifierRecordingModesThe PZ3 supports two recording modes: Individual Differential and Shared Differential.For Indiv
System 3 6-13PZ3 Low Impedance Amplifierconnectors on the PZ3 back panel. A break out box or connector(s) are required for electrode connection. TDT p
6-14 System 3PZ3 Low Impedance AmplifierPZ3_ControlMacroThe PZ3 Control macro should be added to your RPvdsEx circuit to configure all hardware featu
System 3 6-15PZ3 Low Impedance AmplifierPZ3_ChanMapMacroIn the data stream on the RZ2, the odd numbered channels are the recording channels and the
6-16 System 3PZ3 Low Impedance Amplifierparameter inputs allow toggling of clipping LEDs and toggling (+) or (-) channel impedance measurements.PZ3Op
System 3 6-17PZ3 Low Impedance AmplifierClipWarningsAnalog clipping occurs when the input signal is too large. If analog clipping occurs, TDT recomme
1-15RZ5 BioAmp ProcessorRZ5BioAmpProcessorRZ5OverviewThe RZ5 BioAmp Processor is available with either one or two 400 MHz Sharc digital signal pro
6-18 System 3PZ3 Low Impedance AmplifierEnablingtheHighInputRangeModeThe high input range mode can be enabled through the PZ3_Control macro. To e
System 3 6-19PZ3 Low Impedance AmplifierBatteryStatusLEDsBattery Level: Eight LEDs indicate the voltage level of the selected battery bank. These LE
6-20 System 3PZ3 Low Impedance Amplifierimpedance checking mode. Please note that this does not necessarily reflect how the hardware channels are used
System 3 6-21PZ3 Low Impedance Amplifier*Note: If longer cable lengths are required, contact TDT.Power Requirements2 Lithium Ion cells at 10 AmpHours
6-22 System 3PZ3 Low Impedance AmplifierInputConnectorsPZ3 amplifiers have up to 16 26-pin headstage connectors on the back of the unit. The PZ3 chan
6-23PZ-BAT External Battery Pack for the PZ AmplifiersPZ‐BATExternalBatteryPa ck forthePZAmplifiersPZ‐BATOver viewAn external battery pack is
6-24 System 3PZ-BAT External Battery Pack for the PZ AmplifiersNote: All time values are typical. 9640 hrs12834 hrs25621 hrCharger:internal 6VDC, 3A p
6-25PZ4 Digital Headstage ManifoldPZ4DigitalHeadstageManifoldPZ4OverviewThe PZ4 is a high channel count manifold for transmitting extracellular re
6-26 System 3PZ4 Digital Headstage ManifoldHardwareSet‐upThe PZ4 can connect to any RZ with a PZ port. This includes an RZ2, any RZ with an RZDSP-P c
System 3 6-27PZ4 Digital Headstage ManifoldPowerSwitchTo turn the PZ4 on, move the two-position battery switch located on the front panel to the ON p
1-16 System 3RZ5 BioAmp Processortime applications or custom applications. This manual includes device specific information needed during circuit desi
6-28 System 3PZ4 Digital Headstage ManifoldBatteryStatusLEDsEight LEDs on the front panel indicate the voltage level of the PZ4 battery. When the ba
6-29PZ5 NeuroDigitizerPZ5NeuroDigitizerPZ5OverviewThe PZ5 is a multi-modal neurodigitizer suitable for recording a broad range of biological potenti
6-30 System 3PZ5 NeuroDigitizerThe PZ5 can connect to the ‘PZ’ fiber optic input on an RZ2 or RZ5D base station, or directly to an RZDSP_P card on any
System 3 6-31PZ5 NeuroDigitizerThe PZ5-32 model can have a maximum of two logical amplifiers configured. All other PZ5s can have a maximum of four log
6-32 System 3PZ5 NeuroDigitizerSamplingRateandOnboardFiltersThe sampling rate of each logical amplifier is adjustable (max 50 kHz, min 750 Hz) and
System 3 6-33PZ5 NeuroDigitizerThe macro configuration options are available in the macro properties dialog and can be accessed by double-clicking the
6-34 System 3PZ5 NeuroDigitizer These changes are required only when recording 128 channels at 50 kHz. In every other case, the Float (32 bits) format
System 3 6-35PZ5 NeuroDigitizerSyste mConnectionDiagramfor PZ5with RZ5DConnectingHeadstagesandElectrodesSignals are input via multiple mini-D
6-36 System 3PZ5 NeuroDigitizerTo test the impedance of your hardware set-up:1. Touch the Test icon on the desired logical amplifier. The Impedance
System 3 6-37PZ5 NeuroDigitizerWaveformDisplayScreenThe Waveform Display screen is displayed by touching the Preview icon on an existing logical a
System 3 1-17RZ5 BioAmp ProcessorThe zBus Interface The zBus Interface provides a connection to the PC. Data and host PC control commands are transfer
6-38 System 3PZ5 NeuroDigitizerTo change the time scale:• Swipe left or right on the bottom of the screen. (D)To return to the Main Configuration scre
System 3 6-39PZ5 NeuroDigitizer4. To configure the number of channels in the logical amplifier, touch the desired number in the list. 5. Touch the OK
6-40 System 3PZ5 NeuroDigitizer All logical amplifiers that have been defined are represented on the right side of the screen and labeled in logical o
System 3 6-41PZ5 NeuroDigitizerAmpTypeSelectionScreenThe Amp Type Selection screen is displayed by touching the Plus Sign icon on the Main Config
6-42 System 3PZ5 NeuroDigitizerDeleteButtonDelete the logical amplifier and display a confirmation screen before returning to the Main Configuration
System 3 6-43PZ5 NeuroDigitizerSamp Rate (Sampling Rate) Choose a sampling rate from a list of values: 750 Hz, 1.5 kHz, 3 kHz, 6 kHz, 12 kHz, 25 kHz,
6-44 System 3PZ5 NeuroDigitizer560Hz, 1120Hz, and 2240Hz. This feature is only selectable in daughter board firmware v1.3 and above, and PZ5 software
System 3 6-45PZ5 NeuroDigitizerInformation displayed includes: Charging Indicates if the charger is plugged into the PZ5 (Yes/No).Voltage Current volt
6-46 System 3PZ5 NeuroDigitizerInfo Open the device System Info screen to view version numbers for various hardware, software and firmware components.
System 3 6-47PZ5 NeuroDigitizerOKButtonSave changes and return to the System Setup screen.CancelButtonReturn to the System Setup screen without savi
1-18 System 3RZ5 BioAmp ProcessorLED will be lit dim green if the cycle usage on a DSP is 0%. If the demands on a DSP exceed 99% of its capacity on an
6-48 System 3PZ5 NeuroDigitizerImportant! The update process can take up to an hour to complete. Make sure the PZ5 battery charger is plugged in durin
System 3 6-49PZ5 NeuroDigitizerPZ5FeaturesClipWarningsandActivityDisplayThe front panel LEDs can be used to indicate spike activity and/or clip w
6-50 System 3PZ5 NeuroDigitizerBatteryOverviewThe PZ5 neurodigitizer features a 32 Amp-hour Lithium ion battery pack.ChargingtheBatteriesOperate th
System 3 6-51PZ5 NeuroDigitizer*Note: If recording at ~50 kHz on 128 channels, see “PZ5 Software Control” on page 6-32, for more information.InputCon
6-52 System 3PZ5 NeuroDigitizer^Note:InLocalre feren cemode,Pi n15is GroundandPi n13isAltRef.#Note:InSharedrefe rence mode,Pin13is
6-53External ChargerExternalChargerPZ5‐BATOverviewThe PZ5-BAT is an external battery charger for the PZ5 NeuroDigitizer’s 32 Amp-hour Lithium ion,
6-54 System 3External Charger2. The connector between the batter pack and the device will be immediately visible. Press down on the tab to release the
System 3 6-55External ChargerTo install a battery pack:1. Connect the pack’s cable to the PZ5 cable. The connectors are keyed to prevent miswiring.2.
6-56 System 3External Charger2. Verify the display reads “LiPo CHARGE” on the first line and then “3.5A” and “3.7V(1S)” on the second line.3. If the d
6-57PZ5M Medically Isolated NeuroDigitizerPZ5MMedicallyIsolatedNeuroDigitizerPZ5MOverviewThe PZ5M is a mains powered multi-modal neurodigitizer, w
System 3 1-19RZ5 BioAmp Processor The following table provides a quick overview of the amplifier and analog I/O features and how they must be accessed
6-58 System 3PZ5M Medically Isolated NeuroDigitizereach inputting 64 recording channels (or 32 differential channels) along with ground and reference.
System 3 6-59PZ5M Medically Isolated NeuroDigitizerSys te m ConnectionDiagramforPZ5M‐512withRZ2ConnectingHeadstagesandElectrodesSignals are i
6-60 System 3PZ5M Medically Isolated NeuroDigitizerLogicalAmplifiersThe PZ5M can have a maximum of four logical amplifiers. Though each bank has its
System 3 6-61PZ5M Medically Isolated NeuroDigitizerDifferentialIn Differential mode, the inputs in each bank of the logical amplifier are paired; odd
6-62 System 3PZ5M Medically Isolated NeuroDigitizerPZ5_512_Control macro sets the default logical amplifier configurations when the circuit first runs
System 3 6-63PZ5M Medically Isolated NeuroDigitizerUsingthePZ5MFrontPanelDisplayThe front panel display is a touchscreen interface for impedance
6-64 System 3PZ5M Medically Isolated NeuroDigitizerTo preview the data:1. Touch the Preview icon on the desired logical amplifier to enter the Wavef
System 3 6-65PZ5M Medically Isolated NeuroDigitizerTo view a different subset of channels:• Swipe up or down on the left side of the screen. (A)To cha
6-66 System 3PZ5M Medically Isolated NeuroDigitizer2. Touch the desired Amp Type icon on the left side of the screen.The text to the center right of
System 3 6-67PZ5M Medically Isolated NeuroDigitizerThe logical amplifier is configured and a representative diagram is added to the screen. To configu
1-20 System 3RZ5 BioAmp ProcessorFiberOversampling(acquisitiononly)The fiber optic cable that carries the signals to the fiber optic input ports on
6-68 System 3PZ5M Medically Isolated NeuroDigitizerMainConfigurationScreenThe Main Configuration screen provides a touchscreen interface for configu
System 3 6-69PZ5M Medically Isolated NeuroDigitizerSU TealNot configured GrayWarning: A red outline indicates the bank is configured as part of a logi
6-70 System 3PZ5M Medically Isolated NeuroDigitizerOptions include:OKButtonSave selections and open the Configuration Options screen.DeleteButtonDel
System 3 6-71PZ5M Medically Isolated NeuroDigitizerTo return to the Amp Type Selection screen:• Touch the Amp Type button.Each Amp Type includes prese
6-72 System 3PZ5M Medically Isolated NeuroDigitizerA limited set of channels are visible at any one time. Swipe vertically on the touchscreen to scrol
System 3 6-73PZ5M Medically Isolated NeuroDigitizer(see “Pinout Diagrams” on page 6-79. Ref and AltRef impedance values are displayed on the top row.
6-74 System 3PZ5M Medically Isolated NeuroDigitizerSettings include:Boot Amp Select the default logical amplifier settings when the PZ5M is first powe
System 3 6-75PZ5M Medically Isolated NeuroDigitizerInformation displayed includes:Device PZ5M model number.Software version Currently installed versio
6-76 System 3PZ5M Medically Isolated NeuroDigitizerWirelessNetworksScreenThe Wireless Networks screen is displayed by touching Wifi on the System Se
System 3 6-77PZ5M Medically Isolated NeuroDigitizerPZ5MFeaturesStatusLEDA single front panel LED indicates when the device is powered on. 1 Hz no c
System 3 1-21RZ5 BioAmp ProcessorDouble-click the macro to access the settings on the Digital I/O tab. The RZ5_Control macro also offers a Direction C
6-78 System 3PZ5M Medically Isolated NeuroDigitizerExternalGroundThe external ground is optional and should only be used in cases where the subject m
System 3 6-79PZ5M Medically Isolated NeuroDigitizerInputConnectorsPZ5M NeuroDigitizers has up to eight headstage connectors on the back of the unit.
6-80 System 3PZ5M Medically Isolated NeuroDigitizerNoneReferenceModeSharedReferenceModePin Name Description Pin Name Description1 A1 Analog Input
System 3 6-81PZ5M Medically Isolated NeuroDigitizerDifferentialReferenceModeNote: There are 32 (+) channels and 32 (-) channels per mini-DB80 connec
6-82 System 3PZ5M Medically Isolated NeuroDigitizerStream_Store_MC2 if writing into a data tank, and Stream_Server_MC or Stream_Remote_MC if streaming
6-83Medusa PreAmpsMedusaPreAmpsMedusaOverviewThe Medusa Preamplifiers are low noise digital bioamplifiers and are available with either PCM or Sigma
6-84 System 3Medusa PreAmpswhen the data is displayed or acquired (for example, adding a SampDelay to the RPvdsEx circuit).ClipWarningLightsWhen the
System 3 6-85Medusa PreAmpsbattery, such as lead acid batteries used for motorized wheel chairs. Contact TDT for more information.RA16PAMedusaPreAmp
6-86 System 3Medusa PreAmpsNote: Grounds (pins 13, 15, 16) are tied together.4‐ChannelPinoutA 4-Channel connector is found only on models shipped be
6-87RA8GA Adjustable Gain PreAmpRA8GAAdjustableGa inPreAmpRA8GAOverviewThe RA8GA was designed to acquire and digitize multi-channel data from a va
1-22 System 3RZ5 BioAmp ProcessorAnalogI/O‐ADCInputsandDACOutputsADC and DAC LED indicators are labeled and located to the right of the byte C
6-88 System 3RA8GA Adjustable Gain PreAmpvoltage ranges. Max input lights located to the left of the button, indicate the current selection.ToBaseThe
System 3 6-89RA8GA Adjustable Gain PreAmpRA8GAGainSettingsAccountingforGainSettingsinRPvdsExThe output from a RA8GA generates a floating-point
6-90 System 3RA8GA Adjustable Gain PreAmpAnalogInputPinoutDiagramA/D Sample Rate6, 12, or 25 kHzCross Talk< -70 dB (DC - Nyquist)Input Impedance
6-91Headstage Connection GuideHeadstageConnectionGuideOverviewGround and Reference placement is important in all headstage configurations. They dete
6-92 System 3Headstage Connection GuideSingleHeadstageConfigurationsMultipleHeadstageConfigurationsNote: All headstages must use the same Ground w
System 3 6-93Headstage Connection GuideACommonErrortoAvoidWhen using multiple headstages a common error is to connect separate grounds for each he
6-94 System 3Headstage Connection GuideCorrectConfigurationThese headstages are correctly sharing a single node for ground. All headstages will be ab
6-95TB32 32-Channel DigitizerTB3232‐ChannelDigitizerTB32OverviewThe TB32 32 channel digitizer interfaces directly with Triangle BioSystems, Inc. (T
6-96 System 3TB32 32-Channel DigitizerTB32FeaturesAnalogAcquisitionChannelsThe TB32 acquires signals using 16-bit sigma-delta ADCs, which provide s
System 3 6-97TB32 32-Channel DigitizerPowerLightThe power light is illuminated when the device is on. It flashes quickly if the battery is low. It fl
System 3 1-23RZ5 BioAmp ProcessorRZ5TechnicalSpecificationsNote: Technical Specifications for amplifier A/D converters are found under the preamplif
6-98 System 3TB32 32-Channel DigitizerPinoutDiagramsNote: No connections should be made to pins 17, 18, 19, and 37.Pin Name Description Pin Name Desc
Pa r t7:St imulusIsolator
7-2 System 3
7-3MS4/MS16 Stimulus IsolatorMS4/MS16StimulusIsolatorMS4/MS16OverviewThe MS4/MS16 Stimulus Isolator converts digital waveforms into analog current
7-4 System 3MS4/MS16 Stimulus IsolatorThe final analog current output from the isolator is adjusted to match the stimulation control waveform by adjus
System 3 7-5MS4/MS16 Stimulus IsolatorAC coupler (supplied with all MS4/MS16s) directly to the Stim Output connector on the stimulus isolator to block
7-6 System 3MS4/MS16 Stimulus Isolator4. Connect the fiber optic cable from the MS16 fiber optic port labeled To Base to the fiber optic port labeled
System 3 7-7MS4/MS16 Stimulus Isolatorsetting any channel in a bank to both Stimulate and Reference mode turns off that entire bank of channels. An AC
7-8 System 3MS4/MS16 Stimulus IsolatorControlOutputLightsA Control Output Light (one for each digital I/O) indicates that the digital output channel
System 3 7-9MS4/MS16 Stimulus IsolatorWhen the MS16_Control macro is not sufficient for your task, a circuit can be designed using the Poke component
iiiSystem3ManualTableofContentsPart1:RZZ‐SeriesProcessorsRZ2BioAmpProcessor ...
1-24 System 3RZ5 BioAmp ProcessorDB25AnalogI/OPinoutPin Name Description Pin Name Description1 NA Not Used 14 NA Not Used2153164175 AGND Analog Gro
7-10 System 3MS4/MS16 Stimulus IsolatorWhen using components that output a logical signal, such as a PulseTrain, the output range can be defined when
System 3 7-11MS4/MS16 Stimulus IsolatorIn the example correction circuit above: • The value for “correction” represents the results of the calculation
7-12 System 3MS4/MS16 Stimulus IsolatorSettingMultipleChannelsforStimulationorLocalReferenceTo configure multiple reference channels, the Chann
System 3 7-13MS4/MS16 Stimulus IsolatorImportant! Writing a 0 to the RefChan_Mask macro input while the Channel Select Method is set to With Chan Mask
7-14 System 3MS4/MS16 Stimulus IsolatorNote: To conserve the life of the stimulus isolator's onboard and external batteries, remember to power do
System 3 7-15MS4/MS16 Stimulus IsolatorSummary:SimultaneousStimulationonMultipleChannelsThe example below shows a more complete picture, with the
7-16 System 3MS4/MS16 Stimulus IsolatorSignalOutputtoStimulusChannelsTo generate signals on the stimulus isolator, the output waveforms are poked
System 3 7-17MS4/MS16 Stimulus IsolatorThe table below maps channel numbers to mask values:For example:If channels 1 (channel mask 1), 2 (channel mask
7-18 System 3MS4/MS16 Stimulus IsolatorSee “Switchable Headstages” on page 10-29, for more information about controlling the headstage.Workingwithth
System 3 7-19MS4/MS16 Stimulus IsolatorRX7 When using the RX7, the high current mode can be set by sending a value of 214 to memory address 9. Therefo
System 3 1-25RZ5 BioAmp ProcessorDB25DigitalI/OPinoutPin Name Description Pin Name Description1C0 Byte CBit Addressable Digital I/OBits 0, 2, 4, an
7-20 System 3MS4/MS16 Stimulus IsolatorNote: Channels 5 - 16 not available on the MS4.ControlOutputConnectorThis connector provides access to contro
System 3 7-21MS4/MS16 Stimulus IsolatorBatteryReferenceThe stimulus isolator uses an onboard Lithium-Ion battery for general device operation. These
7-22 System 3MS4/MS16 Stimulus Isolatoralert the user of a low voltage condition. To extend the life of the battery, we recommend enabling only the de
System 3 7-23MS4/MS16 Stimulus IsolatorSerialnumbersbelow4000The MS4/MS16 has undergone several design changes to improve performance and usabilit
7-24 System 3MS4/MS16 Stimulus Isolator
7-25IZ2 StimulatorIZ2StimulatorIZ2OverviewThe IZ2 Stimulator converts digital waveforms into analog waveforms as part of a computer-controlled neura
7-26 System 3IZ2 StimulatorStimulation control waveforms for each electrode channel are first defined on the RZ base station and digitally transmitted
System 3 7-27IZ2 StimulatorStimulatorBatteriesPower for stimulation is supplied by one of TDT's battery packs (LZ48-200 or LZ48-400). Both batte
7-28 System 3IZ2 Stimulator4. Connect the fiber optic cable from the IZ2/IZ2H fiber optic port labeled Fiber to the fiber optic port labeled To IZ2 on
System 3 7-29IZ2 Stimulatorinput port (labeled Fiber) and the other end connects to the fiber optic input port (labeled To IZ2) on the back panel of t
1-26 System 3RZ5 BioAmp Processor
7-30 System 3IZ2 StimulatorMacro Settings DescriptionStimSignal: Multi-channel floating point input stream of stimulus waveforms.MonBank: Select which
System 3 7-31IZ2 StimulatorSignalResolutionSignal resolution is dependent on the sampling rate used. PCM D/A converters allow users to generate preci
7-32 System 3IZ2 Stimulatorstimulus. The output (desired V) can be connected directly to the StimSignal port of the IZ2_Control macro. The IZ2_Control
System 3 7-33IZ2 StimulatorSumming a large constant value with the signal will switch that channel into Open or Short mode. The values in the Config D
7-34 System 3IZ2 StimulatorMacro Settings DescriptionInput: Multi-channel floating point input stream of stimulus waveforms.Output: Multi-channel fl
System 3 7-35IZ2 Stimulator^Note: the sampling rate is also limited by the RZ processor used for stimulator control. When sampling at 195.3125 kHz, re
7-36 System 3IZ2 Stimulator1klo ad, 3mAstim,50kHzsamplingra te.Slewra te: ~0.38V/us5klo ad,12Vstim,50kHzsamplingrate. Slewrate :~2.0
System 3 7-37IZ2 StimulatorNote: TDT technical support (386-462-9622 or [email protected]) before attempting to make any custom connections to pins 6, 1
7-38 System 3IZ2 StimulatorNote: TDT technical support (386-462-9622 or [email protected]) before attempting to make any custom connections to pins 6, 1
System 3 7-39IZ2 StimulatorLZ48StatusLEDsVA: Positive Battery PoleVB: Negative Battery PoleVC: Logic Battery LevelEight LEDs indicate the voltage le
1-27RZ5D BioAmp ProcessorRZ5DBioAmpProcessorRZ5DOverviewThe RZ5D BioAmp Processor is available with either three or four 400 MHz Sharc digital sig
7-40 System 3IZ2 Stimulator
7-41IZ2M/IZ2MH StimulatorIZ2M/IZ2MHStimulatorIZ2M/IZ2MHOverviewAs part of a computer-controlled neural stimulator system, the IZ2M/IZ2MH outputs con
7-42 System 3IZ2M/IZ2MH StimulatorThe driving voltage is adjusted according to Ohm’s law (V=IR), where I is the desired stimulation current and R is t
System 3 7-43IZ2M/IZ2MH StimulatorTheStimulatorSystemA typical system consists of an RZ processor equipped with a specialized DSP (RZ-DSP-I) and add
7-44 System 3IZ2M/IZ2MH StimulatorConnect the fiber optic cable from the stimulator’s fiber optic port labeled Fiber to the fiber optic port labeled T
System 3 7-45IZ2M/IZ2MH StimulatorWhen all safety checks have passed both the blue (mains power) and yellow (Ready) LEDs will be lit (no flashing). Th
7-46 System 3IZ2M/IZ2MH Stimulator*The Blue LED is primarily used to indicate power on/off and safety ok/fault. However, when the IZ2M/IZ2MH is active
System 3 7-47IZ2M/IZ2MH StimulatorBatteryOperationandChargingThe stimulator has an onboard, 240 Wh battery for device operation. The battery charge
7-48 System 3IZ2M/IZ2MH StimulatorSignalResolutionSignal resolution is dependent on the sampling rate used. PCM D/A converters allow users to generat
System 3 7-49IZ2M/IZ2MH Stimulatorport of the IZ2_Control macro. The IZ2_Control macro is configured for Current Stim Mode with the High Current Range
1-28 System 3RZ5D BioAmp Processortime applications or custom applications. This manual includes device specific information needed during circuit des
7-50 System 3IZ2M/IZ2MH StimulatorSumming a large constant value with the signal will switch that channel into Open mode. The values in the Config Dat
System 3 7-51IZ2M/IZ2MH StimulatorIZ2M/IZ2MHStimulatorTechnicalSpecificationsMini‐DB26ConnectorPinoutsfortheIZ2M/IZ2MHStimOutputConnectorNot
7-52 System 3IZ2M/IZ2MH Stimulator
Pa r t8:VideoProcessor
8-2 System 3
8-3RV2 Video ProcessorRV2VideoProcessorRV2OverviewAs part of a system is comprised of a machine vision color camera (VGAC), and a dedicated video p
8-4 System 3RV2 Video ProcessorSnapshots are sent from the RV2 over the network to the PC for laying out regions using RVMap software. Configuration f
System 3 8-5RV2 Video ProcessorRecordingSessionsWhen OpenWorkbench is set to ‘Record’ mode and a Video_Access macro is present in the circuit, Workbe
8-6 System 3RV2 Video ProcessorRV2toRZConnectionDiagramIn the diagram above, a single RZ connects to the RV2. The fiber optic cables are color cod
System 3 8-7RV2 Video ProcessorConfiguringtheRV2Default configuration settings allow the RV2 to begin streaming video immediately. The RV2 supports
System 3 1-29RZ5D BioAmp ProcessorDSP-2 and DSP-3 are special optical DSPs. These DSPs have a direct fiber optic connection to the IZ and PZ interface
8-8 System 3RV2 Video Processor6. Select Use the following IP address and enter these values:IP address: 10.1.0.x, where x can be any value from 1 to
System 3 8-9RV2 Video Processor5. Select Use the following IP address and enter these values:IP address: 10.1.0.x, where x can be any value from 1 to
8-10 System 3RV2 Video ProcessorTo access the RV2 file system through a network:1. DHCP must be enabled on the network in order to access the RV2. If
System 3 8-11RV2 Video ProcessorNamingConventionWhen connected to an active network, TDT’s OpenEx software sends information to the RV2 via a broadca
8-12 System 3RV2 Video ProcessorDevice Name: The NetBIOS name of the device. Firmware Version: The currently installed firmware version number. This i
System 3 8-13RV2 Video ProcessorRecord: Performs a manual recording. Since the camera is in free-run mode the frame rate will be maximized. Tap Record
8-14 System 3RV2 Video ProcessorStatusThe Status tab provides system information such as processor usage rates, core temperatures, fan speeds, device
System 3 8-15RV2 Video Processorestimated amount of time remaining for the Resync process is displayed.File System Check: The RV2 will perform a file
8-16 System 3RV2 Video ProcessorNumber of Drives: Displays the number of drives currently installed.Array Type: Displays the currently configured arra
System 3 8-17RV2 Video ProcessorEthernetPortsTwo Ethernet ports are provided on the back panel, Video and Network.Camera-1 The Camera-1 port connects
1-30 System 3RZ5D BioAmp ProcessorStatusLightsTwo LEDs report the status of the multiprocessor's individual DSPs and will be lit solid green whe
8-18 System 3RV2 Video ProcessorVGAC Specifications:TroubleshootingThe following section provides examples and solutions to some of the errors that co
System 3 8-19RV2 Video ProcessorRV2InterfaceBecomesSloworUnresponsiveEvery thirtieth time the RV2 is booted up, it performs a disk check. The len
8-20 System 3RV2 Video Processor
8-21RVMap SoftwareRVMapSoftwareRVMapOverviewThe RVMap application provides a simple visual interface to define regions and targets for video trackin
8-22 System 3RVMap SoftwareWindowThe main workspace window displays an image from a camera or loaded file. Click-and-drag tools are used to define reg
System 3 8-23RVMap Software3. Select the image file and click Open.LoadingImagesfromtheRV2RVMap can auto-detect the RV2 and then retrieve a snapsh
8-24 System 3RVMap SoftwareDefiningRegionsRVMap allows users to define up to eight active regions and one void region. Active regions are numbered on
System 3 8-25RVMap SoftwareModifyingaRegionTo move a region:• Click and drag the region to the desired location.To change the region number: 1. Regi
8-26 System 3RVMap SoftwareNote: Selected regions can also be changed using the Regions menu.To edit the vertices:1. Hold down CTRL and double-click a
System 3 8-27RVMap Software3. Ensure the Target Type is set to Fixed. 4. In the Target Radius box, type a new value to define the target radius (in pi
System 3 1-31RZ5D BioAmp ProcessorThe PZ port can be used with any of the PZ preamplifiers including the PZ2, PZ3, and PZ5 or the PZ4 digital headstag
8-28 System 3RVMap SoftwareRelativeTargetsOnce a Fixed target has been placed, a Relative target can be placed. An arc segment around the Fixed targe
System 3 8-29RVMap Software6. Under Parents, select the desired target from the Primary and Secondary (if there are more than two targets already) dro
8-30 System 3RVMap SoftwareReferenceTargetsReference targets can be created after one or more Parent targets have been place. References can be place
System 3 8-31RVMap Software6. Click OK.SavingConfigurationsThe configuration is saved to an RVMap file (*.rvm).To save the map file:1. Click the File
8-32 System 3RVMap SoftwareTo open the Scale/Offset Objects dialog:• Click the File menu and click Scale/Offset Objects.Offset Click arrows to offset
System 3 8-33RVMap SoftwareReferencePointsandRangeThe units/scaling of the workplace and all X, Y coordinate values returned by the tracking algori
8-34 System 3RVMap SoftwareTrackSpecificationsThe Track Specifications area of the Settings dialog box displays details of the current map configurat
System 3 8-35RVMap SoftwareSettings Launch the Settings Window and allow the user to define range, camera, and track specifications.Exit Manual Mode I
8-36 System 3RVMap SoftwareTargets Enable click drawing tool to place a new target.WindowMenuNew Window Not currently used.Cascade Not currently used
System 3 8-37RVMap Software Show/Hide Regions Toggle the region image overlay on or off. Edit Vertices Enable click-and-drag editing for a selected re
1-32 System 3RZ5D BioAmp ProcessorADC and DAC or via a 25-pin analog I/O connector. See “RZ5D Technical Specifications” on page 1-34 for the DB25 pino
8-38 System 3RVMap Software
Pa r t9:MicroElectrodeArrayInterface
9-2 System 3
9-3MZ60 MicroElectrode Array InterfaceMZ60MicroElectrodeArrayInterfaceMZ60OverviewThe MZ60 Microelectrode Array (MEA) Interface is used with our R
9-4 System 3MZ60 MicroElectrode Array Interfacetransferred to the PC for data storage. A PZ2 amplifier may be substituted for the PZ5 in some cases. A
System 3 9-5MZ60 MicroElectrode Array InterfaceRefer to the vendor’s specifications of the chosen MEA plate regarding the MEA pinouts and technical sp
9-6 System 3MZ60 MicroElectrode Array InterfaceMZ60SingleChanne lCi rcuitDiagramEach of the sixty channels can be configured in one of two states:
System 3 9-7MZ60 MicroElectrode Array InterfaceGeneralTipsWhen recording signals make sure that the PZ5 digitizer is not connected to the charger as
9-8 System 3MZ60 MicroElectrode Array InterfaceMEAConnectorPinoutsStimulate/RecordSwitchingBanksA DIP-switch bank is located on each of the four
Pa r t10:HighImpedanceHeadstages
System 3 1-33RZ5D BioAmp ProcessorNote: By default, all digital I/O are configured as inputs.The RZ digital I/O ports have different voltage outputs a
10-2 System 3
10-3ZIF-Clip® HeadstagesZIF‐Clip®HeadstagesZIF‐Clip®OverviewThe ZIF-Clip® headstage (Patent No. 7540752) features an innovative, hinged headstage de
10-4 System 3ZIF-Clip® HeadstagesZIF‐Clip®PassiveHeadstagesZIF-Clip passive headstages contain no active electronics. They provide passive cabling i
System 3 10-5ZIF-Clip® HeadstagesPart Numbers:ZCD32 – 32-channel Digital ZIF-Clip® headstageZCD64 – 64-channel Digital ZIF-Clip® headstageZCD96 – 96-c
10-6 System 3ZIF-Clip® HeadstagesZIF‐Clip®HeadstageO‐RingsAll ZIF-Clip® headstages are shipped with two o-rings for additional connection security.
System 3 10-7ZIF-Clip® HeadstagesThe diagram below illustrates the connection of a ZC64 ZIF-Clip® headstage to the PZ5. Note that the bank channel num
10-8 System 3ZIF-Clip® HeadstagesTechnicalSpecificationsZIF‐Clip®StandardHeadstageImportant! When using multiple headstages, ensure that a single g
System 3 10-9ZIF-Clip® HeadstagesZIF‐Clip®DigitalHeadstageZIF‐Clip®HeadstagePinoutsIf you are interested in using a third party electrode see “ZIF
10-10 System 3ZIF-Clip® Headstagesfollowing diagrams show the headstage pinouts (channel connections to the amplifier) and board dimensions for connec
System 3 10-11ZIF-Clip® Headstages64‐ChannelHeadstagePinoutsImages are not to scale. Pinouts are looking through the headstage shell (or into a matc
iv System 3MedusaPreAmps ... ...
1-34 System 3RZ5D BioAmp ProcessorUDPEthernetInterface(Optional)The RZ UDP Ethernet interface is designed to transfer data to or from a PC. RZ devi
10-12 System 3ZIF-Clip® Headstages96‐ChannelHeadstagePinoutsImages are not to scale. Pinouts are looking through the headstage shell (or into a matc
System 3 10-13ZIF-Clip® HeadstagesSee Hirose specification for recommended footprint. Hirose Connectors:ZC96 - DF30FC-50DS-0.4V x 2128‐ChannelHeadsta
10-14 System 3ZIF-Clip® HeadstagesG Common/Ground ConnectionR Reference ConnectionSee Hirose specification for recommended footprint. Hirose Connector
System 3 10-15ZIF-Clip® HeadstagesThe ZIF-Clip® headstage holders securely hold your analog or digital ZIF-Clip headstages during electrode insertion
10-16 System 3ZIF-Clip® HeadstagesUsingtheZCD‐ROD32The ZCD-ROD32 has a unique design that requires a different insertion procedure. To use the heads
System 3 10-17ZIF-Clip® HeadstagesThe lock pin has small ridges that should be aligned with the grooves on the face of the clip. If you have trouble c
10-18 System 3ZIF-Clip® HeadstagesZCD‐RODDimensions(fordigitalheadstages)Form Factor 32-channel 64-channel 96-channelHeight5.5 mm (11.50 mm with l
10-19Acute (Non-ZIF) HeadstagesAcute(Non‐ZIF)HeadstagesNN64AC64‐ChannelAcuteHeadstageThe 16 Channel acute The 64 Channel Acute headstage is reco
10-20 System 3Acute (Non-ZIF) HeadstagesTechnicalSpecifications WARNING! When using multiple headstages ensure that all ground pins are connected to
System 3 10-21Acute (Non-ZIF) HeadstagesNN32AC‐32ChannelAcuteHeadstageThe 32 Channel Acute headstage is recommended for extracellular neurophysio
System 3 1-35RZ5D BioAmp ProcessorBNCChannelMappingPlease note channel numbering begins at the top left block of BNCs for both analog and digital I/
10-22 System 3Acute (Non-ZIF) HeadstagesTechnicalSpecifications WARNING! When using multiple headstages ensure that all ground pins are connected to
System 3 10-23Acute (Non-ZIF) HeadstagesJumperConfigurationThe following table describes the jumper configurations and associated requirements.RA16A
10-24 System 3Acute (Non-ZIF) Headstagesof the system. Check the specifications of your amplifier for voltage range. Also keep in mind that the range
System 3 10-25Acute (Non-ZIF) HeadstagesPart Numbers: RA4AC1—4 Channel Acute Headstage for Medusa PreAmps, with unity (1x) gainRA4AC4—4 Channel Acute
10-26 System 3Acute (Non-ZIF) HeadstagesPinoutDiagramThe numbers in the above diagram show the channel connections to the amplifier. The electrode co
10-27Chronic (Non-ZIF) HeadstagesChronic(Non‐ZIF)HeadstagesRA16CH/LP16CH‐16ChannelChronicHeadstageThe 16 Channel Chronic headstages are recomme
10-28 System 3Chronic (Non-ZIF) HeadstagesThe table below lists the input voltage ranges for the 16 channel chronic headstages for either a +/- 1.5 VD
10-29Switchable HeadstagesSwitchableHeadstagesSH16/SH16‐Z‐SwitchableAcuteHeadstageThe SH16/SH16-Z is a 16 channel acute headstage containing reco
10-30 System 3Switchable HeadstagesSwi tch ableHeadstageDiagramThe 16 channel switchable acute headstage has an 18-pin DIP connector that can be use
System 3 10-31Switchable HeadstagesSetup parameters determine which channels are used for stimulation and whether the headstage will be operated in si
1-36 System 3RZ5D BioAmp ProcessorDB25DigitalI/OPinoutPin Name Description Pin Name Description1C0 Byte CBit Addressable Digital I/OBits 0, 2, 4, a
10-32 System 3Switchable Headstagesconnection of a given channel to the Stimulus Isolator. Bit 16 controls the ground and bit 17 controls the record r
System 3 10-33Switchable HeadstagesThe third segment of the chain uses a pulse train to send the 24-bit pattern serially (MSB first) to the headstage.
10-34 System 3Switchable HeadstagesA poke component is used to send the resulting value to memory address 51 on the RZ5 processor or memory address 3
System 3 10-35Switchable HeadstagesDB25PinoutConnectionsforusewithMedusaPreAmpsMiniDB26PinoutConnectionsforusewithPZPreAmpsPin Name Des
10-36 System 3Switchable HeadstagesHeadstagePinoutThe numbers in the diagram to the right refer to the channel connections to the preamp connector or
System 3 10-37Switchable HeadstagesNote: The global reference (Ref) is connected to the SH16/SH16-Z ground pin (G of headstage pinout).Pin Name Descri
10-38 System 3Switchable HeadstagesSH16‐IZ‐16ChannelSwitchableAcuteHeadstageThe SH16-IZ is a 16 channel acute headstage containing programmable
System 3 10-39Switchable HeadstagesThe 16 channel switchable acute headstage has an 18-pin DIP connector that can be used with standard high impedance
10-40 System 3Switchable HeadstagesMultiple SH16-IZs can be used with a single IZ2. The MonBank input determines which SH16-IZ is updated when the Sti
System 3 10-41Switchable HeadstagesDB26StimulatorConnectorPin Name Description Pin Name Description1 A1 Analog Input Channel Number Ch 1-414 V+ Posi
1-37RZ6 Multi I/O ProcessorRZ6MultiI/OProcessorRZ6OverviewThe RZ6 Multi I/O Processor is a high sample rate processor with flexible input/output c
10-42 System 3Switchable Headstages
10-43ECoG HeadstagesECoGHeadstagesCB16‐PMT‐16ChannelECoGHeadstageThe 16 Channel ECoG headstages are recommended for 13 gauge tunneling needle/in
10-44 System 3ECoG HeadstagesVDC or less. Check the preamplifier voltage input and power supply specifications and headstage gain to determine the vol
Pa r t11:LowImpedanceHeadstages
11-2 System 3
11-3Low Impedance HeadstagesLowImpedanceHeadstagesRA4LI‐FourChannelHeadstageThe RA4LI headstage is designed for low impedance electrodes with in
11-4 System 3Low Impedance HeadstagesThe table below lists the input voltage ranges for the RA4LI headstage for either a +/- 1.5 VDC or +/- 2.5 VDC po
System 3 11-5Low Impedance HeadstagesImpedanceCheckingwiththeLow‐ImpedanceHeadstageThe Impedance checker on the RA16LI provides a simple check of
11-6 System 3Low Impedance HeadstagesNote: Pins 6, 14, 17, 18 and 19 are not connected.RA16LI‐D‐16ChannelHeadstagewithDifferentialThe RA16LI-D h
System 3 11-7Low Impedance HeadstagesHeadstageTechnicalSpecifications WARNING! When using multiple headstages ensure that all ground pins are connec
1-38 System 3RZ6 Multi I/O Processorvoltage setting (110 V or 220V). If you need to change the voltage setting, please contact TDT support at 386.462.
11-8 System 3Low Impedance HeadstagesPinoutDiagramNote: Pins 1, 21-24 and 39 are not connected.Pin Name Description Pin Name Description1 NA Not Used
Pa r t12:AdaptersandConnectors
12-2 System 3
12-3Probe AdaptersProbeAdaptersAdaptersOverviewEach TDT headstage is designed for use with a particular style of probe. Probe adapters allow each he
12-4 System 3Probe AdaptersCH‐AC ChronicHeadstagetoAcuteProbe(16Channels)This adapter connects a 16-channel acute probe to a TDT chronic headst
System 3 12-5Probe AdaptersCHx2‐NN 16ChannelChronicHeadstageto32ChannelAcuteProbeThis adaptor connects a 32-channel acute NeuroNexus probe to
12-6 System 3Probe AdaptersImportant! The corresponding channels from each probe connection are tied together, so that channel 1 of the Chronic connec
System 3 12-7Probe Adapters36-pin female Omnetics nano dual row header (pinout looking into the connector)AcutePinout0.5 mm female 18-pin DIP socket
12-8 System 3Probe AdaptersSee “ZIF-Clip® Headstages” on page 10-3, for more information on ZIF-Clip® connectors.ConnectingtheAdaptertothenanoZ™
12-9ZIF-Clip® Headstage AdaptersZIF‐Clip®HeadstageAdaptersZIF-Clip® headstage adapters are available for use with a variety of electrode styles. Whe
System 3 1-39RZ6 Multi I/O ProcessorEach DSP has its own 64MB of SDRAM memory. Large and complex circuits should be designed to balance memory needs (
12-10 System 3ZIF-Clip® Headstage AdaptersZCA‐OMN16 ZIF ‐Clip® HeadstagetoChronicProbe(16Channels)This adapter connects a 16-channel chronic Om
System 3 12-11ZIF-Clip® Headstage AdaptersZCA‐NN32 ZIF‐Clip®Headstageto32ChannelAcuteProbe)This adapter connects a 32-channel acute NeuroNexus
12-12 System 3ZIF-Clip® Headstage AdaptersJumperConfigurationThe following table describes the jumper configurations for both the ZCA-NN32 and ZCA-NN
System 3 12-13ZIF-Clip® Headstage AdaptersZCA‐GM60ConnectionDiagramZCA‐OMN96 ZIF ‐Clip® Headstageto96‐ChannelOmneticsProbeThis adapter connect
12-14 System 3ZIF-Clip® Headstage Adapters Use jumper to choose which reference (R1, R2, R3) to use for all channels. Only one reference may be s
System 3 12-15ZIF-Clip® Headstage AdaptersZCA‐CK96AConnectionDiagram.A four-pin header located on the backside of the adapter is provided for access
12-16 System 3ZIF-Clip® Headstage AdaptersZCA‐ICS96 ZIF‐Clip®Headstageto96‐ChannelChronicProbeThis adapter connects a 96-channel acute CyberKine
System 3 12-17ZIF-Clip® Headstage AdaptersPinoutsPinoutsarelo o ki n gintothecon nectorandre flect thepreamplifierchannels .ZCA‐UP16 16‐Cha
12-18 System 3ZIF-Clip® Headstage AdaptersZCA‐UP24 24‐ChannelPlextrode®U‐ProbetoZIF‐ClipheadstageThis adapter connects a 24-channel acute Plextr
System 3 12-19ZIF-Clip® Headstage AdaptersMill-Max Connector Specifications:Pitch: 0.050" (1.27 mm)Row Spacing: 0.050" (1.27 mm)ZCA‐MIL3
1-40 System 3RZ6 Multi I/O ProcessorRZ6AnalogInputFlowDiagramInput signals for channel A are input either through the XLR input (Mic-A), the audio
12-20 System 3ZIF-Clip® Headstage AdaptersZCA‐VD8 ZIF‐Clip®HeadstagetoVersaDrive con‐nector(32Channels)This adapter connects a Versa Drive via
12-21Preamplifier AdaptersPreamplifierAdaptersEach TDT headstage is designed for use with either a Legacy or Z-Series preamplifier. Preamplifier adap
12-22 System 3Preamplifier AdaptersPLX‐ZCAZ‐SeriesHeadstagetoPlexon®Preampli‐fierThis adapter connects a Z-Series headstage to a Plexon® pream
12-23ConnectorsConnectorsLI‐CONN‐LowImpedanceConnectorsA set of multi-channel low impedance connectors (LI-CONN) for the RA16LI is available for u
12-24 System 3Connectors
12-25SplittersSplittersS‐BOX‐AmplifierInputSplitterThe S-BOX is a 32-channel passive signal splitter for use with the PZ3 Low Impedance Amplifier.
12-26 System 3SplittersDB37PinoutNote: No connections should be made to pins 17, 18, and 36.Pin Name Description Pin Name Description1 A1 Analog inp
System 3 12-27SplittersDB26PinoutPZ3 amplifiers have up to 16 26-pin headstage connectors on the back of the unit. The PZ3 channels are marked next t
12-28 System 3SplittersDB37PinoutNote: No connections should be made to pins 17, 18, and 36.DB26PinoutPZ5 NeuroDigitizers have up to eight 26-pin h
System 3 12-29SplittersNote: There are 16 channels per DB26 connector. Bank A is shown. Channels in Bank B are incremented by an additional 16 channel
System 3 1-41RZ6 Multi I/O ProcessorRZ6FeaturesOnboard Analog I/OandOptionalAmplifierInputThe RZ6 is equipped with onboard analog I/O and may a
12-30 System 3Splitters
Pa r t13:MicrowireArrays
13-2 System 3
13-3ZIF-Clip® Based Microwire ArraysZIF‐Clip®BasedMicrowireArraysZIF-Clip® microwire arrays are made to user specifications. All arrays use polyimi
13-4 System 3ZIF-Clip® Based Microwire ArraysGroundingtheElectrodeThe images below show the possible connections made for reference or ground wires.
System 3 13-5ZIF-Clip® Based Microwire ArraysSee the Online Order Form for more information on ordering specifications.ZIF‐Clip®BasedMicrowireArray
13-6 System 3ZIF-Clip® Based Microwire Arrays64ChannelZIF‐Clip®MicrowireArray(lookingintoarray)
System 3 13-7ZIF-Clip® Based Microwire ArraysZCAP‐AluminumZIF‐Clip®CapPart Number: ZCAPn, ZL-CAPnThe ZIF-Clip® Caps are made of high quality alumi
13-8 System 3ZIF-Clip® Based Microwire Arrays
13-9Omnetics Based Microwire ArraysOmneticsBasedMicrowireArraysPart Numbers: OMN1010, OMN1005, OMN1020, OMN1030Standard 50 μm polyimide-insulated t
1-42 System 3RZ6 Multi I/O ProcessorADCandMicrophoneAmplifierAn onboard two channel amplifier provides gain for the onboard analog input signals (M
13-10 System 3Omnetics Based Microwire ArraysSpecifications might vary based on custom order: See the Online Order Form (PDF format) for more informat
13-11Suggestions for Microwire InsertionSuggestionsforMicrowireInsertionI.GeneralProcedures:The following are general suggestions for insertion o
13-12 System 3Suggestions for Microwire InsertionWe first prepare the subject and perform a craniotomy above the implantation site following the metho
System 3 13-13Suggestions for Microwire Insertion
13-14 System 3Suggestions for Microwire Insertion
Pa r t14:Atte n ua to r
14-2 System 3
14-3PA5 Programmable AttenuatorPA5ProgrammableAtte nu ato rOverviewThe PA5 Programmable Attenuator is a precision device for controlling signal leve
14-4 System 3PA5 Programmable AttenuatorFeaturesDisplayDisplays the current level of attenuation being applied to the signal or displays the manual op
System 3 14-5PA5 Programmable AttenuatorFor a definition of each menu item:• Turn the Select knob until the name of the menu appears on the display, t
System 3 1-43RZ6 Multi I/O ProcessorProgrammableAttenuationThe RZ6_AudioOut macro provides access to two channels of programmable attenuation for pre
14-6 System 3PA5 Programmable Attenuator4. To exit any menu without saving parameter changes, press and release the ESC button before the settings are
System 3 14-7PA5 Programmable AttenuatorPA5TopLevelMenuCommand DescriptionAtten Sets attenuation from 0.0 to 120.0 dB in 0.1 dB increments. The def
14-8 System 3PA5 Programmable AttenuatorSettingBaseAttenuationWhen operating the PA5 manually in User Attenuation (UserAtt) mode, the Base Attenuati
System 3 14-9PA5 Programmable Attenuator6. To exit the UserOps menu, press and release the ESC button again.Example1:AddingSpeakerCalibrationAtte
14-10 System 3PA5 Programmable AttenuatorSettingaReferenceValueThe Reference parameter is used to display the intensity of the output signal. This
System 3 14-11PA5 Programmable AttenuatorSavingPresetConfigurations WARNING: This procedure overwrites the contents of the selected preset location.
14-12 System 3PA5 Programmable AttenuatorPA5DisplayIconsMenuLevelIconsAttenuationModeIconsDisplay DescriptionSingle Box: indicates a top-level m
System 3 14-13PA5 Programmable AttenuatorPA5TechnicalSpecificationsInput Signal Range±10V peakFrequency RangeDC – 200 kHzAttenuation Range0.0 to 120
14-14 System 3PA5 Programmable Attenuator
Pa r t15:Commutators
System 3 vPart16:TransducersandAmplifiersMF1Multi‐FieldMagneticSpeakers...
1-44 System 3RZ6 Multi I/O ProcessorStereoHeadphoneOutputDAC channels A and B are also available as a stereo headphone output through two 1/8” audio
15-2 System 3
15-3Motorized CommutatorsMotorizedCommutatorsOverviewThe ACO32 is a motorized commutator that actively tracks rotation on a headstage cable connected
15-4 System 3Motorized CommutatorsACxModelsEarlier versions of the commutator were designed for use with the Medusa RA16PA PreAmps. The ACx commutato
System 3 15-5Motorized CommutatorsACxSet‐upNotesDimensions and form factor for ACx commutators not pictured. Before using the AC32 and AC64 commutat
15-6 System 3Motorized CommutatorsA cable kit is provided to ensure cables used with the external ground are suitable for this use. Each kit includes:
System 3 15-7Motorized CommutatorsAmplifierConnectionsThe ACO32 commutator interfaces with a PZ amplifier via two DB26 connectors, 16 channels each)
15-8 System 3Motorized Commutators2. Use the hex driver to remove two screws securing the encoder clamping plates. 3. Carefully pull the FORJ away fro
System 3 15-9Motorized Commutators2. Slowly push fiber through hole until the end appears among the wires on the other side of the ACO32.3. Using a pa
15-10 System 3Motorized Commutators6. Connect the FC/PC connector end of the fiber to (the smaller section of) the fiber optic rotary joint. 7. Slowly
System 3 15-11Motorized CommutatorsACO32TechnicalSpecificationsInterfaceReceptaclesThe interface receptacle diagram shows how the pins on each rec
System 3 1-45RZ6 Multi I/O Processor(serial number < 2000) were limited to 8 bits. By default, all lines are configured as inputs. Data direction i
15-12 System 3Motorized CommutatorsACO32AmplifierConnectorsPinoutConnectors are labeled A and B. Electrode channels below are relative to the elect
System 3 15-13Motorized CommutatorsAC16andAC32AandBConnectorPinoutNote: Electrode channel numbers relative to the connected bank of preamplifie
15-14 System 3Motorized CommutatorsAC641‐4ConnectorPinoutNote: Electrode channel numbers relative to the connected bank of preamplifier channels.
Pa r t16:Trans ducersandAmplifiers
16-2 System 3
16-3MF1 Multi-Field Magnetic SpeakersMF1Multi‐FieldMagneticSpeakersOverviewTDT Multi-Field Magnetic Speakers offer high output and fidelity over a
16-4 System 3MF1 Multi-Field Magnetic SpeakersPart Numbers:MF1-M—MonoMF1-S—Dual (two speakers)Multi‐FieldConfigur ations
System 3 16-5MF1 Multi-Field Magnetic SpeakersTo configure the MF1 for closed-field:1. Ensure black o-ring is in place on back of CF adapter, as shown
16-6 System 3MF1 Multi-Field Magnetic SpeakersClosed‐FieldSpeakerDesignConsiderationsWhen using the closed-field configuration for experiments, the
System 3 16-7MF1 Multi-Field Magnetic SpeakersClosed fieldmeasurementstypicalforapprox0.1cceartipcouplerusing+/‐1Vinput.
1-46 System 3RZ6 Multi I/O ProcessorImportant! The status lights flash when a DSP goes over the cycle usage limit, even if only for a cycle. This help
16-8 System 3MF1 Multi-Field Magnetic Speakers
16-9EC1/ES1 Electrostatic SpeakerEC1/ES1Electr ostaticSpeakerOverviewTDT Electrostatic Speakers (Patent No. US 6,842,964 B1) are designed specifical
16-10 System 3EC1/ES1 Electrostatic SpeakerWhen connecting the cable, ensure that the four pin connectors are fully seated on the speaker and the spea
System 3 16-11EC1/ES1 Electrostatic SpeakerRoutineCareandMaintenanceInspect speakers for visual damage or obstruction of the speaker holes prior to
16-12 System 3EC1/ES1 Electrostatic SpeakerHarmonicDistortionat4VPeakNoise as well as harmonic distortion is measured. Lower signal levels (e.g.
System 3 16-13EC1/ES1 Electrostatic Speakeris provided as representative of the type of response that may be obtained in a closed field.In this case,
16-14 System 3EC1/ES1 Electrostatic Speaker
16-15ED1 Electrostatic Speaker DriverED1ElectrostaticSpeakerDriverOverviewThe ED1 is a broadband electrostatic driver that produces incredibly flat
16-16 System 3ED1 Electrostatic Speaker DriverED1TechnicalSpecificationsNote: For further information, see “EC1/ES1 Electrostatic Speaker” on page 1
16-17FLYSYS FlashLamp System FLYSYSFlashLampSystem OverviewThe Flashlamp System includes a high intensity photic stimulator, lamp driver, and liqui
System 3 1-47RZ6 Multi I/O ProcessorDigitalI/OLEDIndicatorsThe digital I/O LED indicators are located directly below the VFD and DSP status LEDs an
16-18 System 3FLYSYS FlashLamp System SystemFeaturesVrefInputSignalThe variable reference voltage controls flashlamp output intensity and can be su
System 3 16-19FLYSYS FlashLamp System FlashIntensityTo calculate the flash intensity, use the following equation: J=1/2(0.50 μF) (Vref*100)^2FLYSYS
16-20 System 3FLYSYS FlashLamp System
16-21HB7 Headphone BufferHB7HeadphoneBufferOverviewThe HB7 headphone buffer is used to amplify signals for headphones. The HB7 is a two channel devi
16-22 System 3HB7 Headphone BufferDC/ACSwitchThe DC/AC switch can be used to switch from DC coupling to AC coupling mode. In AC coupling mode, DC shi
System 3 16-23HB7 Headphone Buffer
16-24 System 3HB7 Headphone Buffer
16-25MA3: Microphone AmplifierMA3:MicrophoneAmplifierMA3OverviewThe MA3 is a two-channel microphone amplifier for auditory scientists. This high-qu
16-26 System 3MA3: Microphone AmplifierOutputsTwo BNC outputs give easy connection to any TDT System 3 device. The maximum voltage output is +/- 10 Vo
System 3 16-27MA3: Microphone AmplifierFrequencyResponseDiagram
1-48 System 3RZ6 Multi I/O ProcessorS/N (typical)115 dB (20 Hz - 80 kHz at 5 Vrms)THD (typical)-90 dB (1 kHz output at 5 Vrms)Sample Delay31 (Serial n
16-28 System 3MA3: Microphone Amplifier
16-29MS2 Monitor SpeakerMS2MonitorSpeakerMS2OverviewThe MS2 Monitor Speaker is used as an audio monitor for signals up to ± 10 V. The MS2 output le
16-30 System 3MS2 Monitor Speaker
16-31SA1 Stereo Amplifier SA1Ster eoAmplifierSA1OverviewThe SA1 is a power amplifier for the zBus that delivers up to 3 watts of power to speakers
16-32 System 3SA1 Stereo Amplifier GangedOutputModeA ganged output mode gives 6 dB of additional gain when connected to a speaker. Split the signal
16-33SA8 Eight Channel Power Amplifier SA8EightChannelPower AmplifierSA8OverviewThe SA8 is an eight-channel power amplifier that delivers up to
16-34 System 3SA8 Eight Channel Power Amplifier GainThe gain is controlled by two toggle switches on the front panel of the SA8. The following table d
System 3 16-35SA8 Eight Channel Power Amplifier AnalogInputPinoutDiagramAnalogOutputPinoutDiagramPin Name Description Pin Name Description1 A1 A
16-36 System 3SA8 Eight Channel Power Amplifier
16-37CF1/FF1 Magnetic SpeakersCF1/FF1MagneticSpeakersOverviewTDT Magnetic Speakers offer high output and fidelity over a bandwidth from 1 – 50 kHz.
System 3 1-49RZ6 Multi I/O ProcessorD/AdBRolloffDiagramThis graph shows the dB rolloff for the RZ6 with varying sampling frequencies for the D/A. T
16-38 System 3CF1/FF1 Magnetic SpeakersBNC cable from the FF1 or CF1 to one of the output BNC connectors on the SA1 as shown in the following figure.I
System 3 16-39CF1/FF1 Magnetic Speakerstest the device under experimental conditions to ensure it meets their requirements. Technical Specifications m
16-40 System 3CF1/FF1 Magnetic SpeakersCF1TechnicalSpecificationsClosed‐fieldFrequencyResponseCF1measurementstypicalforapprox0.1ccpvc tube
Pa r t17:SubjectInterface
17-2 System 3
17-3BBOX Button BoxBBOXButtonBoxBBOXOverviewThe button box is a complete subject response interface. It is an excellent system for psychoacoustics,
17-4 System 3BBOX Button BoxRP2.1toBBOX ConnectionPowerRequirementsThe button box is supplied with a 3.3 Volt lithium-ion battery pack. This high
System 3 17-5BBOX Button BoxBBoxOrga n iz atio nofButtonsNote: The button box power supply must be turned on for the buttons to operate.Many of the
17-6 System 3BBOX Button BoxResettingtheLatch...In the previous examples all button presses are acquired, that is, if a person presses buttons simul
System 3 17-7BBOX Button BoxControllingtheLEDsTheir are several methods to control LEDs. The button box may have up to four LEDs for each button and
1-50 System 3RZ6 Multi I/O ProcessorDB25DigitalI/OPinoutPin Name Description Pin Name Description1C0 Byte CBit Addressable digital I/OBits 0, 2, 4,
17-8 System 3BBOX Button BoxTo follow along with this example:• Open the LED1 RPvdsEx file in the ButtonBox example folder (TDT|RPvd-sEX|Examples|Butt
System 3 17-9BBOX Button BoxCombiningthepositionandcolumnsetup...The following example combines the two data tables and uses one ToBits component
17-10 System 3BBOX Button BoxNote: See the Bit Pattern Table for a review of how each bit position is used.This example is found in the LED3 RPvdsEx f
17-11RBOX Response BoxRBOXResponseBoxThe RBOX has four buttons for user response and four LEDs that can be used to provide a subject with feedback.
17-12 System 3RBOX Response BoxNote that the logic on the inputs to the RP/RM/RX processors is reversed. Therefore, when polling the lines to determin
System 3 17-13RBOX Response Box5. To enable the check boxes, delete Und from the Decimal Value box and enter 240. This configures Bits 4 through 7 as
17-14 System 3RBOX Response Box5. To enable the check boxes, delete Und from the Decimal Value box and enter 240. This configures Bits 4 through 7 as
System 3 17-15RBOX Response BoxResponseBoxTechnicalSpecificationsRBOX,RBOX_RX6,andRBOX_RZ6SpecificationsResponse Box for RP2.1, RXn, and RZ6.Bu
17-16 System 3RBOX Response BoxRBOXDB25PinoutRBOX4TechnicalSpecificationsResponse Box for RM1, RM2, or PI2.RBOX4DB9ConnectorPinoutPins Name Des
17-17BH32 Behavioral Cage ControllerBH32BehavioralCageControllerOverviewThe BH32 Behavioral Cage Controller integrates neural signals with behavior
System 3 1-51RZ6 Multi I/O ProcessorDigitalI/O–DB9ConnectorPinout Note: Serial numbers < 2000 only.Pins Name Description Pin Name Description
17-18 System 3BH32 Behavioral Cage ControllerImportant! The two External Power Molex connectors on the top panel are shorted together; do not use more
System 3 17-19BH32 Behavioral Cage ControllerReplicatinganExistingBehavioralControlSystemThe TDT system provides a unifying interface for sending
17-20 System 3BH32 Behavioral Cage ControllerEthernetPortThe Ethernet port allows direct connections to a PC or network for communication over UDP. T
System 3 17-21BH32 Behavioral Cage Controlleron the PC Ethernet interface. In such cases, the IP address of the BH32 must be used instead.Configuratio
17-22 System 3BH32 Behavioral Cage ControllerFirmwareVersionStack Version and Build Date refer to the version of software running on the BH32.Usernam
System 3 17-23BH32 Behavioral Cage ControllerControllerConfigurationNote: This page may require authentication. See “Username and Password” above, fo
17-24 System 3BH32 Behavioral Cage ControllerTo make changes to the configuration:• Type or select the desired values then click the Save Config butto
System 3 17-25BH32 Behavioral Cage ControllerTo Change the Host name (NetBIOS name):• Type the desired host name in the Host Name box and click the Sa
17-26 System 3BH32 Behavioral Cage ControllerBH32CircuitDesignTo communicate with an RZ device, the BH32 must first be paired with the RZ device. Se
System 3 17-27BH32 Behavioral Cage ControllerAn incoming UDP packet is de-serialized and sent to the macro outputs. The “NewPack” output goes high (1)
1-52 System 3RZ6 Multi I/O Processor
17-28 System 3BH32 Behavioral Cage Controller6. (7 bit) Message number – See “Messages” below, for available commands.7. (32 bits) Reserved word – See
System 3 17-29BH32 Behavioral Cage ControllerGET_SET_CONFIG 4 Used to set various device parameters. Can directly set Device number, RS232 baud rate,
17-30 System 3BH32 Behavioral Cage ControllerBH32TechnicalSpecificationsGET_SET_RZ_IP 13 If the RZ IP Address is non-zero, the BH32 will enter RZ_CO
System 3 17-31BH32 Behavioral Cage ControllerDB25DigitalIOPinoutPin Name Description Pin Name Description1 C1 Bank CBits 1, 3, 5, and 714 C2 Bank C
17-32 System 3BH32 Behavioral Cage ControllerDB25DigitalIO‐2PinoutMolexPinandSocketConnectorsEXTERNALPOWERV+ Positive VoltageNC No ConnectionG
17-33HTI3 Head Tracker InterfaceHTI3HeadTrackerInterfaceOverviewThe HTI3 is an interface between your System 3 processor and either the Polhemus FA
17-34 System 3HTI3 Head Tracker InterfaceNote: The XYZ space is absolute distance from the transmitter while the AER information is relative to the bo
System 3 17-35HTI3 Head Tracker InterfaceUsingtheminiBIRD®SettoFOBThe miniBIRD® tracker must be set to Normal Addressing Mode and the DIP settin
17-36 System 3HTI3 Head Tracker Interfaceof these ports are automatically scaled accordingly. When the fiber optic inputs are used to acquire signals
System 3 17-37HTI3 Head Tracker Interfaceon all devices. The iterate function duplicates the construct 16 times, with an input signal from channel ‘x’
1-53RZ-UDP RZ Communications InterfaceRZ‐UDPRZCommunicationsInterfaceRZ2ProcessorBacksidewithRZ‐UDPInstalledRZ‐UDPOverviewThe RZ Communicat
17-38 System 3HTI3 Head Tracker InterfaceThe PulseTrain2 component sends out a pulse every 60 samples. The output from the PulseTrain2 is sent to the
System 3 17-39HTI3 Head Tracker InterfaceUsingtheHTI3withHRTFFiltersOne great advantage of the HTI3 setup is that users can connect the device to
17-40 System 3HTI3 Head Tracker InterfaceToTracker‐DB9PinoutforAscensionFlockofBirds®ToTracker‐DB9PinoutforPolhemusFASTRAK®Pin Name De
Pa r t18:SignalHandling
18-2 System 3
18-3PM2Relay Power MultiplexerPM2Relay Powe r MultiplexerPM2ROverviewThe PM2Relay (PM2R) is a 16 channel multiplexer for delivering powered and unp
18-4 System 3PM2Relay Power Multiplexerdesigned to use a bit-code pattern from an RP2 Real-Time Processor or RV8 Barracuda Processor.RPControlInputT
System 3 18-5PM2Relay Power MultiplexerThe chart below shows the bit ID, its integer value, and its function.Note: Make sure to put a delay of one sam
18-6 System 3PM2Relay Power MultiplexerSignalOutput‐DB25PinoutAnalog OutputDiagramPin Name Description Pin Name Description1 GND Ground 14 NA No
System 3 18-7PM2Relay Power MultiplexerPM2R‐ControllingSignalPresentationThe circuits described here use typical techniques for controlling the si
vi System 3
1-54 System 3RZ-UDP RZ Communications InterfaceRZ‐UDPBasicsInstallationThe TDT drivers installation provides the UDP test application as well as two
18-8 System 3PM2Relay Power MultiplexerControllingthePM2RwithWordOut:In this example a WordOut is used to control the PM2R (via an RP2.1) from wit
18-9SM5 Signal MixerSM5SignalMixerSM5OverviewThe SM5 is a three-channel signal mixer. The relative contribution of the three inputs to the final ou
18-10 System 3SM5 Signal MixerClippingThe variable weighting provides a great deal of flexibility in input and output signals. However, care should be
18-11PP16 Patch PanelPP16Pa tc h Pa n e lThe PP16 Patch Panel provides convenient BNC connections for easy access to the digital and analog inputs a
18-12 System 3PP16 Patch PanelMappingtheInputsandOutputsforEachDeviceEach device has a unique input and output configuration. The table below s
System 3 18-13PP16 Patch PanelThe PP16 can also be used with the RX and RZ devices, however, the PP24 is recommended. MappingRA16BAI/OThe diagram be
18-14 System 3PP16 Patch PanelMappingRP2/RP2.1I/OThe diagram below maps the RP2 Digital I/O connection to the PP16. The last seven BNC connectors a
System 3 18-15PP16 Patch PanelRV8Optional I/Oto PP1 6ConnectionDiagramMappingRA8GAA PP16 patch panel can be used to simplify connection to the
18-16 System 3PP16 Patch PanelConnecttothe ETM1ETM1to PP16Conne ctionThe connector labeled J1 is used to connect the ETM1 to a PP16. Plug one en
18-17PP24 Patch Panel PP24Pa tc h Pa n e l OverviewThe PP24 Patch Panel provides front panel, BNC connections for easy access to the digital and an
System 3 1-55RZ-UDP RZ Communications InterfaceStatusLEDsThe UDP Ethernet interface provides several status indicators which are located on the back
18-18 System 3PP24 Patch Panel MappingtheInputsandOutputsforEachDeviceThe PP24 consists of 3 banks of BNC connectors, Bank A, B, and C. Each of
System 3 18-19PP24 Patch Panel The diagram below maps the RX5 or RX7 Multi I/O connections to the PP24.MappingRX6I/ONote: The PP24 can be mounted a
18-20 System 3PP24 Patch Panel MappingRX8I/ONote: The PP24 can be mounted above or below the RX8.The diagram below maps the RX8 Digital I/O connect
System 3 18-21PP24 Patch Panel The diagram below maps the RZ2 Analog I/O connection to the PP24. MappingRZ5,RZ5DI/ONote: The PP24 is mounted below
18-22 System 3PP24 Patch Panel The diagram below maps the RZ5 or RZ5D Analog I/O connection to the PP24. MappingRZ6I/ONote: The PP24 is mounted bel
18-23FB128 Neural SimulatorFB128NeuralSimulatorOverviewThe FB128 Neural Simulator is a tool for testing experimental paradigms during the design pha
18-24 System 3FB128 Neural SimulatorThe simulator can operate in eight different modes and includes an inhibitory/excitatory option for even more outp
System 3 18-25FB128 Neural SimulatorTo cycle through the operating modes:• Press the Mode button. The active mode is indicated by a lit LED on the fac
18-26 System 3FB128 Neural SimulatorLFPx Filter Settings: High Pass: 0 Hz, Low Pass: 300 HzLFP ONLY NORMAL with spikes scaled to zero.Pictured wavefor
System 3 18-27FB128 Neural SimulatorRAWx Filter Settings: UnfilteredNote: To better view Tetrode mode (as pictured above) the channels must be re-mapp
1-56 System 3RZ-UDP RZ Communications InterfaceFor example:Several office computers are connected to a network within an office.IP address Computer 1:
18-28 System 3FB128 Neural Simulatorconnector. When using the Sync input, the mode change can be time stamped from software. The time stamps can be he
18-29ETM1 Experiment Test ModuleETM1ExperimentTestModuleOverviewThe Experiment Test Module (ETM1) allows you to design and test experimental protoc
18-30 System 3ETM1 Experiment Test Module ChronicH eadstageconnectedto ETM1AcuteHeads tageconnectedto ETM1ConnectingtheSignalSourceThe co
System 3 18-31ETM1 Experiment Test ModuleETM1TechnicalSpecificationsJ1DB25PinoutAnalog input channels 1-16. The J1 connector is typically used to
18-32 System 3ETM1 Experiment Test ModuleJ2DB25PinoutAnalog input channels 1-8. Typically used to input signals from the RA16BA or the RV8.Note: Fem
Pa r t19:PCInterfaces
19-2 System 3
19-3Interface Transfer RatesInterfaceTransferRatesTransfer rates depend on a number of factors, including the device accessed the type of transfer,
19-4 System 3Interface Transfer RatesCycleUsageandLargeTransfersThe following graphs show how the cycle usage affects the transfer rate for large
19-5PO5/PO5e Optibit InterfacePO5/PO5eOptibitInterfaceOptibitOverviewThe Optibit system (Optical Gigabit) is designed for users that require high-s
System 3 1-57RZ-UDP RZ Communications InterfaceGatewayAlong with an IP address and subnet mask, networks may optionally use a gateway which is require
19-6 System 3PO5/PO5e Optibit Interfacelaunching TDT software such as zBusMon, RPvdsEx or loading an OpenEx project.Activity The Activity LED is lit
19-7UZ2 USB 2.0 InterfaceUZ2USB2.0InterfaceOverviewThe USB 2.0 zBus Interface mounts in the rear bay of a zBus device chassis and handles communica
19-8 System 3UZ2 USB 2.0 Interfacepatch cable. To connect several device chassis, daisy-chain the connections between the slave chassis as shown below
19-9LO5 ExpressCard to zBus InterfaceLO5ExpressCardtozBusInterfaceLO5OverviewThe LO5 ExpressCard to zBus Interface model provides a means of cont
19-10 System 3LO5 ExpressCard to zBus Interface
19-11Gigabit InterfaceGigabitInterfacePI5Over viewThe Gigabit system is no longer available. It consists of a PCI card (PI5) that fits in the comput
19-12 System 3Gigabit InterfaceProblems loading drivers may occur when the C:WINNT/inf folder is not visible. In Windows Explorer choose Tools|Folder
Pa r t20:ThezBusandPowe r Supply
20-2 System 3
20-3ZB1PS - Powered zBus Device ChassisZB1PS‐Powe re d zBusDeviceChassisOverviewzBus is TDT's high-speed, low-noise bus for System 3 modules
1-58 System 3RZ-UDP RZ Communications InterfaceTheUDPProtocolUDP or “User Datagram Protocol” is a core protocol of the Internet Protocol suite or mo
20-4 System 3ZB1PS - Powered zBus Device ChassisPowerSupplyThe ZB1PS chassis features an onboard, switchable (115V/220V) power source. The power supp
System 3 20-5ZB1PS - Powered zBus Device ChassisTheIndicatorLightA front panel switch turns on the chassis power supply and includes an indicator l
20-6 System 3ZB1PS - Powered zBus Device ChassisZB1PSTechnicalSpecificationsChassisHeight 1UWidthStandard 19’’ rack mountPower Supply (Integrated)Ma
20-7ZB1 Device Caddie and PS25F Power SupplyZB1DeviceCaddieandPS25FPowe rSupplyThe ZB1 and PS25F are TDT’s legacy zBus chassis and power supply.
20-8 System 3ZB1 Device Caddie and PS25F Power Supply
Pa r t21:System 3Utilities
21-2 System 3
21-3zBUSmon – Bus/Interface UtilityzBUSmon–Bus/InterfaceUtilityThe zBUS Monitor program is a tool used to test the USB, Gigabit, or Optibit connect
21-4 System 3zBUSmon – Bus/Interface UtilityRebootSystem!The Reboot System! button resets all hardware in the system and reloads device drivers. To r
System 3 21-5zBUSmon – Bus/Interface UtilityShowVersionCheckBoxWhen the Show Version box is checked, the version numbers of the PC to zBus interfac
System 3 1-59RZ-UDP RZ Communications InterfaceUDPConfigurationGiven this basic understanding of a Network (IP) address, subnet mask, gateway, MAC ad
21-6 System 3zBUSmon – Bus/Interface UtilityViewingMicrocodeVersionforallDSPsonanRZDSPDeviceIf a device has more than one DSP, the system di
System 3 21-7zBUSmon – Bus/Interface UtilityWhen you install TDT Drivers, microcode with a matching version number is stored in .dxe files on the PC.
21-8 System 3zBUSmon – Bus/Interface UtilityIf the automatic update process detects an RX device, a message will be displayed. Press and hold the Mode
System 3 21-9zBUSmon – Bus/Interface Utility2. Click Program {device name} on the shortcut menu.The System3 Device Programmer window is opened. In thi
21-10 System 3zBUSmon – Bus/Interface Utility4. Once you have selected the desired file, click Open. The Open window is closed and the selected file a
Pa r t22:ComputerWorkstation
22-2 System 3
22-3WS High Performance Computer WorkstationWSHighPe rf o rm a n ce ComputerWorkstation WorkstationIncludesKeyboa rd andMouse‐NotPicturedW
22-4 System 3WS High Performance Computer WorkstationWSHardwareSetupUse the provided duplex fiber optic patch cables (orange) to connect the WS’s fa
System 3 22-5WS High Performance Computer WorkstationWSFeaturesLEDDisplayThe LED display provides visual representation of system performance. The
1-60 System 3RZ-UDP RZ Communications InterfaceConfiguringtheUDPthroughtheWebInterfaceEvery RZ UDP interface contains a minimal web server which
22-6 System 3WS High Performance Computer WorkstationVideoSupportThe WS-8 includes a high-performance video card for support of up to two monitors. T
System 3 22-7WS High Performance Computer WorkstationConnectorPanel*Note: 4, 5, and 6 are disabled on the WS8, when using the video card.WS‐8Technic
22-8 System 3WS High Performance Computer WorkstationWS‐4TechnicalSpecificationsCPU3.4 GHz Intel® Core™ i5-3570 Memory4 GB DDR3 DRAMVideo CardIntel
System 3 1-61RZ-UDP RZ Communications InterfaceNote: Any server pages that modify the device configuration require a username and password.Default Use
1-62 System 3RZ-UDP RZ Communications InterfaceCurrentNetworkValueCurrent IP settings are displayed in this area.Settings for configuring the static
System 3 1-63RZ-UDP RZ Communications InterfaceThe Update and Reset button saves the current configuration settings and performs a soft reset of the U
Pa r t1:RZZ‐SeriesProcessors
1-64 System 3RZ-UDP RZ Communications Interface 8. Click OK. The UDP interface connection should now be recognized by the PC. Cycle power on the RZ de
System 3 1-65RZ-UDP RZ Communications Interface 7. Click OK. The UDP interface connection should now be recognized by the PC. Cycle power on the RZ de
1-66 System 3RZ-UDP RZ Communications InterfaceParametersThe user can enable/disable the serial port, specify the baud rate, and select from a list of
System 3 1-67RZ-UDP RZ Communications Interfacesequence of bytes at the beginning of each frame. The user can enter a decimal value or any ASCII chara
1-68 System 3RZ-UDP RZ Communications Interface4 byte header + (16 channels x 4 bytes) = 68 bytes.HeaderFormatThe packet header precedes a new packet
System 3 1-69RZ-UDP RZ Communications Interfacepacket size) set in the macro setup properties dialog. The macro accepts a multi-channel data stream as
1-70 System 3RZ-UDP RZ Communications Interface ReceivingScalarDataConstructWhen data is received, the NewPack signal will output a logic high (1)
System 3 1-71RZ-UDP RZ Communications InterfaceRZ_Serial_RecMacroThe RZ_Serial_Rec macro is used to receive serial data from the RS232 connection and
1-72 System 3RZ-UDP RZ Communications InterfaceNote: To modify the number of channels sent, (packet size) edit the Packet Size parameter found in the
System 3 1-73RZ-UDP RZ Communications InterfaceTo load an existing packet configuration:1. Select Open from the File menu.2. Browse to the desired *.h
1-2 System 3
1-74 System 3RZ-UDP RZ Communications InterfaceTo send a data packet to the RZ processor: 1. Double-click anywhere in the Test Application packet wind
System 3 1-75RZ-UDP RZ Communications Interface4. Click the Send All button to send all data packets to the RZ processor. orSend an individual packet
1-76 System 3RZ-UDP RZ Communications InterfaceThe Test Application runs separate threads for sending and receiving data so it is possible to listen (
System 3 1-77RZ-UDP RZ Communications Interface# configure the header. Notice that it includes the header # information followed by the command 2 (set
1-78 System 3RZ-UDP RZ Communications Interface packet = struct.pack(">%di" % len(data), *(i for i in data)) # send the data packet
Pa r t2:DataStreamers
2-2 System 3
2-3RS4 Data StreamerRS4DataStreamerRS4OverviewThe RS4 Data Streamer is a high performance data storage array designed to store data streamed from t
2-4 System 3RS4 Data StreamerSoftwareControlSoftware control is implemented with circuit files developed using TDT's RP Visual Design Studio (RP
System 3 2-5RS4 Data StreamerIt is important that the Stream_Server_MC macro is assigned to the DSP in the RZ that is physically connected to the RS4
1-3RZ2 BioAmp ProcessorRZ2BioAmpProcessorRZ2OverviewThe RZ2 BioAmp Processor has been designed for high channel count neurophysiology recording an
2-6 System 3RS4 Data StreamerSetting‐UpYourHardwareBasic setup for the RS4 Data Streamer includes connection to one or more RZ2 BioAmp Processors. O
System 3 2-7RS4 Data StreamerConfiguringtheRS4Default configuration settings allow the RS4 to begin streaming data immediately. The RS4 supports the
2-8 System 3RS4 Data Streamer5. Click the Properties button.6. Select Use the following IP address and enter these values:IP address: 0.1.0.x; where x
System 3 2-9RS4 Data StreamerUsingWindowsXPTo access the RS4 file system through a PC:1. You will have to configure the PC TCP/IP settings. Open Con
2-10 System 3RS4 Data StreamerXXXX is the device serial number while the data folder contains the data saved to the storage array.9. Access the files
System 3 2-11RS4 Data StreamerMovingStoredDatatoaDataTankData stored on the RS4 can be easily reincorporated into the OpenEx DataTank format for
2-12 System 3RS4 Data Streamer4. If the Data Tanks share the same name, select Yes to All when asked to confirm possible overwrites. This will NOT ove
System 3 2-13RS4 Data Streamerapplications (such as OpenExplorer). To access the data using these applications simply select the associated block then
2-14 System 3RS4 Data StreamerFirmwareVersion:The currently installed firmware version number is displayed to the left of the local storage label on
System 3 2-15RS4 Data StreamerLocalStorage:Data items stored on the RS4 storage array are populated in the local storage list. Multiple items may b
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